A frequency synthesizer comprises according to FIG. 2, as is well known, a phase locked loop PLL, which locks the output frequency to a reference frequency. Here the reference frequency and the divided frequency from a voltage controlled oscillator are supplied to a phase comparator, whose filtered output voltage is the control voltage of the VCO. The control voltage controls the oscillator, so that its frequency is locked to the frequency of the signal supplied in the reference frequency branch to the phase comparator.
Analog FM modulation can be obtained in a well known way, shown in FIG. 1, by using a shift oscillator based e.g. on a crystal oscillator 11 having a fixed frequency, which is modulated with the modulating signal Mod, the oscillator having an output f.sub.osc(Mod) containing the modulation, which is mixed in the mixer 12 on an unmodulated frequency f.sub.c above or below the carrier. The desired modulated carrier f.sub.c(Mod) is filtered from the resulting mixing products with the filter 13. This known method enables modulation with a DC voltage component, but it requires quite much electrical components and therefore it increases the costs of the product, e.g. a radiotelephone. Another well known method according to FIG. 2 is to directly modulate the voltage controlled oscillator VCO of the PLL frequency synthesizer, by adding the modulating voltage Mod to its control voltage V.sub.cntrl in an adder 26. A modulation of this kind requires the frequency of the modulating signal to be substantially higher than the cut-off frequency of the filter 24 in the phase lock loop, whereby the phase lock does not return the VCO's phase, and therefore the frequency, back to the situation before the modulation, but the phase retains the offset produced by the modulating signal. It is a very demanding task to realize direct modulation of the VCO, because even a small change in the control voltage V.sub.ohj causes a large change in the output frequency f.sub.c. For example, if we require that the oscillator in a radiotelephone operating on the 900 MHz band shall have a control range of e.g. 30 MHz, then the modulating voltage, which added to the control voltage supplied by the phase comparator 23 results in a 5 kHz frequency deviation, is only a few millivolts. Further the frequency offset .DELTA.f/.DELTA.Vohj of the VCO can vary, even strongly, from one unit to another and at different control voltage values, so that the direct VCO modulation requires calibration of each unit and at each frequency. Further it has to be noted that the PLL frequency synthesis always corrects the frequency to the desired value, whereby modulation with a DC component is not possible.
In principle it is also possible to add a phase shift, which represents the modulation, to the signal directed from the VCO to the phase comparator. Then the phase shift of the oscillator output frequency as a function of time is approximately equal to the step-response of the synthesizer's system function. This phase modulation provided by the control of said phase does not enable a continuous modulation with DC component, because the added phase shift can vary only within a narrow range and because it can only delay the phase.
The above presented known structures can create analog phase modulation by using the time derivative of the phase modulation as frequency modulation, or frequency modulation by using the time derivative of the frequency modulation as phase modulation.
It is known to create and define a digital modulation according to FIG. 3b, so that the carrier supplied by a local oscillator is divided into two components, called the I and Q components having a mutual phase shift of 90 degrees. The modulating information is a bit stream. A symbol comprising one or more bits determines e.g. in QPSK modulation the momentary phase shift of the carrier, or in QAM modulation the momentary amplitude and phase. Thus the symbol rate is equal to or lower than the bit rate. The modulation filters 31 process the bit streams further and supply analog I- and Q-coefficients, which in the multipliers 32 are multiplied with the above said carrier components, which then result in the I- and Q-components of the modulated carrier. These are added in the adder 35 and the modulated carrier thus obtained is transmitted. In other words, we obtain the desired modulation when we regulate the amplitudes of the carrier components having a mutual phase shift, and then add them. Examples of this are the FIGS. 3a and 4, of which FIG. 3a shows a modulation pattern, which uses differential quadrature shift modulation DQPSK. In this modulation a symbol, which comprises two bits and determines the carrier phase shift, is differentially coded: the symbols are transmitted as phase changes in the carrier, so that the symbol is not determined by the carrier's absolute phase, but by the phase change compared to the previous state. The circles on the phase circle's periphery in FIG. 3A represent the carrier phase (and a constant amplitude) for different symbols, and the arrows represent possible phase shifts. Adjacent symbols have a difference of one bit. The table in FIG. 4 shows a symbol comprising two bits and .DELTA..phi. is the corresponding carrier phase shift. When thus a carrier phase shift of 135 degrees (3.pi./4) forward is detected, we know that the received (and transmitted) symbol is 01, and if the phase then changes backwards 45 degrees (.pi./4), then the received symbol is 10.
The above presented modulation methods are widely used, despite the mentioned disadvantages. This is due to the shortcomings of known synthesizer arrangements: in the frequency synthesis the phase adjustment accuracy is a whole period of the final frequency generated by the synthesizer, i.e. 360 degrees; and, the smallest adjustable frequency step of the synthesizer has been too large to be used as the frequency deviation.
Commonly assigned patent application (Finland, Jan. 18, 1990) and corresponding U.S. Pat. Nos. 5,079,520, issued Jan. 7, 1992, present an interpolating frequency synthesizer arrangement. The arrangement is based on the fact that the pulses, which both from the reference frequency source and from the VCO via loop dividers are supplied to the phase comparator, are lengthened in delay means by a desired amount, and the pulses are made symmetric. The lengthening of the pulses can not be made as a sliding operation, but the lengthening is made in steps. The lengthening thus means that the frequency of the pulses supplied to the phase comparator also can be regulated to lie between those frequencies, which are obtained when only a loop divider and a reference divider are used, and therefore the synthesizer output frequency raster will be very dense. FIG. 5 shows the basic arrangement of the interpolating frequency synthesizer presented in the application FI-900303, and now the operation of this arrangement is described in general outline. The synthesizer differs from a conventional synthesizer in that a pulse, which has a basic frequency f.sub.o and is divided in the divider 51 by the number M and then supplied to the phase comparator 53, is lengthened in the blocks 52 and 59. Those pulses, which are obtained by dividing the output frequency f.sub.x of the voltage controlled oscillator VCO 55 in the programmable loop divider 56, are also lengthened in the blocks 57 and 58. In the block 59 the basic frequency f.sub.o is multiplied by the number (L+.DELTA.L), and in the block 58 f.sub.o is multiplied by the number L. In the predivider 56 the frequency f.sub.x of the VCO is divided by the number P and by the number P+1 A times, where A is an integer loaded into the counter A, and in the frequency divider by the number N. In this way the phase comparator 53 receives pulse sequences, which in a balanced state have the frequency f.sub.o /M. The pulses supplied to the phase comparator are delayed in the blocks 52 and 57, so that in the block 52 the pulses are lengthened by a time corresponding to k.sub.1 lengths of the periods or durations of delay pulses generated by the block 59, and in the block 57 the pulses are lengthened by a time corresponding to k.sub.2 lengths of the periods or durations of the delay pulses generated by the block 58. The coefficients k.sub.1 and k.sub.2 are updated for each pulse, so that we obtain symmetrical pulses, which are supplied to the phase comparator. It can be shown that then the following formula applies to the output frequency f.sub.x of the VCO 55: ##EQU1## Here we see that the output frequency of the synthesizer can be changed in small increments by changing the numbers k.sub.1 and k.sub.2. The numbers k.sub.1, k.sub.2, L and .DELTA.L are integers, and generally .DELTA.L=1.